Performance and Reliability Evaluation of a Low Voltage and High Speed P-channel Floating Gate Flash Memory
碩士 === 國立交通大學 === 電機學院微電子奈米科技產業專班 === 95 === Recently, the flash memory has become the main stream of nonvolatile semiconductor memory products. High performance and reliability are two major issues for the design and manufacturing. The goal of research and development of flash memory cells is to lo...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2007
|
Online Access: | http://ndltd.ncl.edu.tw/handle/76186610002771102861 |
id |
ndltd-TW-095NCTU5795026 |
---|---|
record_format |
oai_dc |
spelling |
ndltd-TW-095NCTU57950262016-05-04T04:16:30Z http://ndltd.ncl.edu.tw/handle/76186610002771102861 Performance and Reliability Evaluation of a Low Voltage and High Speed P-channel Floating Gate Flash Memory 低電壓且高速操作的P通道快閃式記憶體元件性能及可靠性研究 Yao-Hsien Huang 黃耀賢 碩士 國立交通大學 電機學院微電子奈米科技產業專班 95 Recently, the flash memory has become the main stream of nonvolatile semiconductor memory products. High performance and reliability are two major issues for the design and manufacturing. The goal of research and development of flash memory cells is to lower the operational voltage and to enhance the performance and reliability. Two approaches are widely used to reach the goal: one is to improve the cell structure, and the other is to change the operation scheme. This thesis is to develop an operation scheme to achieve low voltage, low power consumption, and high reliability. P-channel flash memories are studies in this work. We propose a new programming scheme to inject electrons into the floating gate. It is called Forward Bias Assisted Drain Hot Electron Injection (FBADHE). First, we apply a small positive drain bias on the Drain-Substrate junction. Then, we apply an appropriate negative bias and switch the junction to reverse-bias. The change of the mode of p-n junction causes more impact ionization in the deep depletion region and more electron-hole pairs are generated. Carriers are then injected into the floating gate via the assistance of vertical electric field due to positive gate voltage. We compare the performance and reliability of this new operation scheme with other traditional ones used on p-channel flash memories: Band-To-Band Induced Hot Electron Injection (BBHE) and Drain Avalanche Hot Electron Injection (DAHE). Finally, in order to improve the major reliability problem of p-channel flash memories, the drain disturb, we propose an alternative way to solve the problem by applying a moderate negative substrate bias on unselected cell, but a new structure is needed. Steve S. Chung 莊紹勳 2007 學位論文 ; thesis 76 en_US |
collection |
NDLTD |
language |
en_US |
format |
Others
|
sources |
NDLTD |
description |
碩士 === 國立交通大學 === 電機學院微電子奈米科技產業專班 === 95 === Recently, the flash memory has become the main stream of nonvolatile semiconductor memory products. High performance and reliability are two major issues for the design and manufacturing. The goal of research and development of flash memory cells is to lower the operational voltage and to enhance the performance and reliability. Two approaches are widely used to reach the goal: one is to improve the cell structure, and the other is to change the operation scheme. This thesis is to develop an operation scheme to achieve low voltage, low power consumption, and high reliability.
P-channel flash memories are studies in this work. We propose a new programming scheme to inject electrons into the floating gate. It is called Forward Bias Assisted Drain Hot Electron Injection (FBADHE). First, we apply a small positive drain bias on the Drain-Substrate junction. Then, we apply an appropriate negative bias and switch the junction to reverse-bias. The change of the mode of p-n junction causes more impact ionization in the deep depletion region and more electron-hole pairs are generated. Carriers are then injected into the floating gate via the assistance of vertical electric field due to positive gate voltage. We compare the performance and reliability of this new operation scheme with other traditional ones used on p-channel flash memories: Band-To-Band Induced Hot Electron Injection (BBHE) and Drain Avalanche Hot Electron Injection (DAHE). Finally, in order to improve the major reliability problem of p-channel flash memories, the drain disturb, we propose an alternative way to solve the problem by applying a moderate negative substrate bias on unselected cell, but a new structure is needed.
|
author2 |
Steve S. Chung |
author_facet |
Steve S. Chung Yao-Hsien Huang 黃耀賢 |
author |
Yao-Hsien Huang 黃耀賢 |
spellingShingle |
Yao-Hsien Huang 黃耀賢 Performance and Reliability Evaluation of a Low Voltage and High Speed P-channel Floating Gate Flash Memory |
author_sort |
Yao-Hsien Huang |
title |
Performance and Reliability Evaluation of a Low Voltage and High Speed P-channel Floating Gate Flash Memory |
title_short |
Performance and Reliability Evaluation of a Low Voltage and High Speed P-channel Floating Gate Flash Memory |
title_full |
Performance and Reliability Evaluation of a Low Voltage and High Speed P-channel Floating Gate Flash Memory |
title_fullStr |
Performance and Reliability Evaluation of a Low Voltage and High Speed P-channel Floating Gate Flash Memory |
title_full_unstemmed |
Performance and Reliability Evaluation of a Low Voltage and High Speed P-channel Floating Gate Flash Memory |
title_sort |
performance and reliability evaluation of a low voltage and high speed p-channel floating gate flash memory |
publishDate |
2007 |
url |
http://ndltd.ncl.edu.tw/handle/76186610002771102861 |
work_keys_str_mv |
AT yaohsienhuang performanceandreliabilityevaluationofalowvoltageandhighspeedpchannelfloatinggateflashmemory AT huángyàoxián performanceandreliabilityevaluationofalowvoltageandhighspeedpchannelfloatinggateflashmemory AT yaohsienhuang dīdiànyāqiěgāosùcāozuòdeptōngdàokuàishǎnshìjìyìtǐyuánjiànxìngnéngjíkěkàoxìngyánjiū AT huángyàoxián dīdiànyāqiěgāosùcāozuòdeptōngdàokuàishǎnshìjìyìtǐyuánjiànxìngnéngjíkěkàoxìngyánjiū |
_version_ |
1718255233241448448 |