Design of Low Jitter Self-Calibration PLL for 10Gbps SoC Transmission Links Application

碩士 === 國立中央大學 === 電機工程研究所 === 95 === Under the development of the network and computer operated speed in recent years, a trend of data transmission and studying at high-speed serial communication is growing. It is pointed out that the high-speed serial link interface is replacing gradually the conve...

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Bibliographic Details
Main Authors: Yu-Chang Tsai, 蔡玉章
Other Authors: 鄭國興
Format: Others
Language:zh-TW
Published: 2007
Online Access:http://ndltd.ncl.edu.tw/handle/51544491482755791324