Investigation of Heterostructure-Emitter Bipolar Transistors with Superlattice-Base Structure

• Main Authors: I-Hsuan Hsu, 許懿萱
• Other Authors: Jung-Hui Tsai
• Format: Others
• Language: zh-TW
• Published: 2007
• Online Access: http://ndltd.ncl.edu.tw/handle/20280334928642929762

碩士 === 國立高雄師範大學 === 物理學系 === 95 === In this thesis, two heterostructure-emitter bipolar transistors (HEBTs) have been fabricated and investigated. First, by simulated analysis and results the DC performance of InGaP/GaAs npn heterostructure–emitter bipolar transistor with InGaAs/GaAs superlattice–base structure is investigated. The superlattice base consists of ten-period 50 Å InGaAs layers and nine-period 50 Å GaAs layers. For comparison, the conventional InGaP/GaAs HEBT, has a 950 Å GaAs base layer. The average energy gap of the superlattice-base structure is smaller than the conventional InGaP/GaAs HEBT. Under forward B-E bias, the minority carrier storage in the base region is further increased. The phenomenon is due to the electron tunneling through the superlattice base incorporating the thermal diffusion. The more carrier storage in the base substantially causes the collector current to increase and the B-E turn-on voltage to decrease. Excellently DC performance includes a current gain of 246 at VBE =1.25 V and a low offset voltage of 16 mV. On the other hand, an InGaP/GaAs npn heterostructure–emitter bipolar transistor with InGaAs single quantum well structure is investigated by simulated analysis and results. The difference in the base is only an InGaAs single quantum well near the B-E junction in the quantum-well device. Under large forward B-E bias, the great electron is accumulated in the n-GaAs emitter layer. The phenomenon is due to the electron blocking in the base. The more electron heap in the emitter substantially causes the base recombination current to increase and the current gain to decrease. The DC performance is demonstrated including a current gain of 61 at VBE =1.25 V and a low offset voltage of 36 mV. In this thesis, the use of a thin n-GaAs emitter layer can effectively eliminate the potential spike at E-B junction and the superlattice base can facilitate electron transport from the emitter to the base. In addition, the minority carriers in the base are more stored and reduce the B-E turn on voltage. Thus, the excellent DC performance includes higher current gain, lower offset voltage and high device linearity, could be used signal and low power consumption integrated circuit applications.