An Efficient VLSI Architecture for Inverse Quantization and Inverse Discrete Cosine Transform in H.264/AVC FRExt
碩士 === 國立清華大學 === 產業研發碩士積體電路設計專班 === 95 === We propose a pure hardware implementation of inverse quantization and inverse discrete cosine transform for H.264/AVC high profile video decoding. The proposed design supports 4x4 transform, 2x2/4x4 hadamard transform and 8x8 transform. It includes a run l...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2007
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Online Access: | http://ndltd.ncl.edu.tw/handle/52862114609414143904 |