Compilers for VLIW DSP Architectures with Distributed and Irregular Designs
博士 === 國立清華大學 === 資訊工程學系 === 95 === VLIW architectures have already been the main-stream design for a modern high-end processor in recent years to support more instruction-level-parallelism (ILP) and potential performance than the traditional single-issue CISC/RISC machines. Due to the advances in V...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/57626100213633979560 |