Design and Performance Evaluation of on-chip Interconnection Network

碩士 === 國立清華大學 === 電機工程學系 === 95 === With the improvement of chip manufacture process, a single chip may contain more and more functional units. The chip design concepts have emphasized more on the co-operation of a single chip than the improvement of each functional unit. For these reasons, a high e...

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Bibliographic Details
Main Authors: Jwo-An Lin, 林倬安
Other Authors: Yarsun Hsu
Format: Others
Language:en_US
Published: 2007
Online Access:http://ndltd.ncl.edu.tw/handle/76603442305430841666