A Multiplier-based Cryptographic Processor Supporting AES and ECC
碩士 === 國立清華大學 === 電機工程學系 === 95 === We propose an arithmetic unit supporting Advanced Encryption Standard (AES) and Elliptic Curve Cryptography (ECC). The arithmetic unit is based on a modified dual-field multiplier. The size of the multiplier is a design parameter for different throughput and area...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/54619865821967749454 |