FPGA Implementation of Finite-Difference Time-Domain Algorithm
碩士 === 國立臺灣大學 === 光電工程學研究所 === 95 === In this thesis, we use field programmable gate array (FPGA) to implement finite-difference time-domain (FDTD).FDTD is a very powerful algorithm with advantages of minimum assumption and approximation, easy programming, and ability to analyze time domain variatio...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/76027321157740358709 |