Dynamically Adjustable Routing Engine Design for Traffic-aware On-Chip Networking Systems
碩士 === 國立臺灣大學 === 電子工程學研究所 === 95 === According to International Technology Roadmap for Semiconductors (ITRS), the interconnection complexity has increased and dominated the SoC design and its performance. By the end of the decade, the popular bus-based SoC communication will meet its bottleneck in...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/07520859860903261835 |