A Fully Digital External Calibration Technique for 1-bit/stage Pipelined ADC
碩士 === 國立臺灣大學 === 電子工程學研究所 === 95 === In this thesis, a fully digital calibration scheme for the 1-bit/stage pipelined ADC is presented. It is extended from the existing digital calibration algorithm that still suffers arbitrary large DNL in some output codes. The proposed technique extracts these c...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/75115747664456464992 |