| Summary: | 碩士 === 淡江大學 === 機械與機電工程學系碩士班 === 95 === This research proposes a novel concept to fabricate a piezoresistive micro force sensor with a sensing membrane size of 100um×100um by using standard integrated circuit foundry, TSMC 0.35um 2P4M process herein, is provided by CIC (Chip Implementation Center), Taiwan. In this research, we use silicon dioxide as a material of a membrane of the sensor, and polysilicon as a material of piezoresistor. We design the shape of sensors and estimate the output sensitivity of sensor according to the result simulated by finite element method analyze software, ANSYS.
In order to reduce the waste of wafer area, front-side wet etching technique is adopted. We use piranha to remove the metal layers, and then use KOH to remove the residual metal and use TMAH to etch V-grooves of the silicon substrate. We can release the sensing membrane structure successfully by using this process. At last, we use RIE to remove the passivation on pad, by this way the thickness of the sensing membrane can be reduced. After wet etching and dry etching process, we package the dies by dual in-line package print circuit board which is sold in mart.
In this work, the piezoresistive micro force sensor made by CMOS MEMS technique has been fabricated successfully, and it effectively shorten the total time of post process. The micro force sensor has the advantages of smaller size and high sensitivity. In the simulation, we provide 10uN force and get the sensitivity about -6.12 ×10-3 ~ -2.36 uV/V/nN.
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