A Study of Instruction Compression Based on IA-64 Architecture
碩士 === 大同大學 === 資訊工程學系(所) === 95 === Because of many DSPs (Digital Signal Processors) adopt the VLIW (Very Long Instruction Word) architecture to process the signals, we will focus on the VLIW processors; hope to make a normal processing in other VLIW processors in the future. In data compression, t...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2007
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/tpwm2d |