DESIGN OF LOW-ERROR AND LOW-POWER FIXED-WIDTH MULTIPLIERS BASED ON ROW-BYPASSING AND COLUMN-BYPASSING
碩士 === 大同大學 === 通訊工程研究所 === 95 === Power management has become a great concern in VLSI design in recent years, this thesis focuses on the improvement of fixed-width multiplier design, by reducing transition or switch. In this paper we present two methods for designing low power error-compensated fix...
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| Format: | Others |
| Language: | en_US |
| Published: |
2007
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| Online Access: | http://ndltd.ncl.edu.tw/handle/h4jz6r |