Design of A Dual Port Wave Pipelined Static Random Access Memory
碩士 === 吳鳳技術學院 === 光機電暨材料研究所 === 95 === In this thesis, the design of a high speed static random access memory chip using dual-port wave-pipeline design method. This chip is designed according to the 0.35μm CMOS fabrication process rules. The distinguishing feature of our design is accomplished by ad...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/59059947880527436957 |