An H.264/VC-1/AVS In-Loop Deblocking Filter supporting High-Resolution Video Decoding

碩士 === 國立中正大學 === 資訊工程所 === 96 === This thesis presents a high throughput VLSI architecture for multi-standard in-loop deblocking filter (ILF) supporting to H.264 baseline/main/high profile (BP/MP/HP), AVS, and VC-1 simple/main/advanced profile (BP/MP/AP) video decoding targeted at HDTV applications...

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Bibliographic Details
Main Authors: Cheng-an Chien, 簡呈安
Other Authors: Jiun-in Guo
Format: Others
Language:en_US
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/29679202029944325399