Realization of 2-Dimensional 1-Level Lifting-Based Discrete Wavelet Transform Scheme by using FPGA Chip
碩士 === 朝陽科技大學 === 資訊工程系碩士班 === 96 === In this paper, an efficient architecture is proposed for realization of 2D lifting-based 5/3 filter discrete wavelet transform (DWT). By substituting multipliers, it is a better choice to adopt shifters for the realization of lifting computation with the predict...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2007
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/6q8kmd |