Process Design and Parameter Optimization on Nano Imprint
碩士 === 華梵大學 === 機電工程學系博碩專班 === 96 === Because of the limitation arising from the expensive equipments and installments in the clean room, the reduction in feature size of the semiconductor, and the immense increase in R&D time and budget, the traditional manufacturing of the semiconductor have b...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/22258969760049874938 |