Hardware/Software Co-Design FPGA-based Digital Signal Processor with High Area Efficiency
碩士 === 崑山科技大學 === 電子工程研究所 === 96 === This paper proposes a hardware/software co-design approach to reconfigure a RISC processor which is used to implement a digital filter. According to practical requirement, the application specified instruction set can be tuned, and then the processor hardware can...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/s9e9sr |