Designs and analyses of low complexity pulse triggered flip-flops
碩士 === 國立中興大學 === 電機工程學系所 === 96 === In this thesis, we proposed two novel pulse-triggered flip-flop designs for functional versatility. The first circuit is a dual-mode flip-flop, i.e. single- and double-edge triggered modes. A dual-mode pulse generator using pass transistor logic (PTL) is derived...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2008
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Online Access: | http://ndltd.ncl.edu.tw/handle/88912617312969211137 |