Analysis and Architecture Design of H.264/AVC Intra Frame Coder
碩士 === 國立中興大學 === 電機工程學系所 === 96 === In this paper, we proposed an HD720P@30fps H.264 intra frame coder architecture with eight parallel processing elements. And we proposed unique kernel multi-transform architecture, it could generate results of integer transform and Hadamard transform simultaneous...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/05330267733358170595 |