Design of a Clock and Data Recovery Circuit with a Frequency Calibration Technique
碩士 === 國立中興大學 === 電機工程學系所 === 96 === This thesis mainly describes a clock and data recovery circuit with a frequency calibration technique. The thesis will be divided into four parts. The first part of the thesis introduces Optical Network, the specification of the passive optical network and some c...
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| Format: | Others |
| Language: | en_US |
| Online Access: | http://ndltd.ncl.edu.tw/handle/40663099846594558439 |