A 10-bit 100MS/s Current-Steering Digital-to-Analog Converter for WLAN
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 96 === In this thesis, a 10-bit 100M-Sample/s current steering digital-to-analog for WLAN is proposed. It is implemented in TSMC 0.35um 2P4M mixed signal CMOS technology. Segmented current steering architecture that comprises 6MSB’s thermometer code structure and 4LS...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/82012487943461206943 |