Study on the Direct Tunneling Current of MOS Structures with high-κ/SiO2 Gate Stack
碩士 === 國立成功大學 === 電機工程學系專班 === 96 === The continuous CMOS scaling has resulted in a continuous improving of the speed, power consumption, packing density and performance of integrated circuits. As the process technology becomes attractive for the 45 nm node and beyond, the equivalent oxide thickness...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/78869701908084839179 |