Design Automation Tool from Behavior Level to Transaction Level for Virtual Bus-Based Platforms
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 96 === Upon entering SoC era, an IC chip contains more functionalities than ever before. For a top-down system design, it is required to design from higher levels of design abstraction (like algorithm or behavior level) down to gate level. However, there are abundant...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/29171831360729609752 |