The Chip Design of Dual Logarithm Based Digital Signal Processor
碩士 === 國立暨南國際大學 === 電機工程學系 === 96 === In this study, we proposed a digital signal processor which supports dual logarithm based and use its specific instruction set to implement the speech recognition algorithm. We use hardware-software co-design methodology to optimize the processor architecture an...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/70624460802710182359 |