Design of On-Chip Transient Detection Circuits for System-Level ESD Protection
碩士 === 國立交通大學 === 電子工程系所 === 96 === As the improvement of semiconductor process and technology, the device size of CMOS ICs has been scaled down and more complicated functions are integrated into a single chip. The potential destructive nature of ESD in CMOS ICs becomes serious and the design of ESD...
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| Format: | Others |
| Language: | en_US |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/93298520403686991436 |