Germanium quantum-dot single-hole transistors with self-aligned electrodes based on a bottom-gate technology
碩士 === 國立中央大學 === 電機工程研究所 === 96 === As CMOS technology is scaling into nanometer regime, the development of devices is towards small dimension, high speed, and low power consumption. Since single-electron (SE) device not only provide the aforementioned advantages but also could be applied to memory...
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ndltd-TW-096NCU054420172019-05-15T19:18:53Z http://ndltd.ncl.edu.tw/handle/ux7e4n Germanium quantum-dot single-hole transistors with self-aligned electrodes based on a bottom-gate technology 具有自我對準下閘電極鍺量子點單電洞電晶體之研製 Shao-hua Hsu 徐紹華 碩士 國立中央大學 電機工程研究所 96 As CMOS technology is scaling into nanometer regime, the development of devices is towards small dimension, high speed, and low power consumption. Since single-electron (SE) device not only provide the aforementioned advantages but also could be applied to memory-devices, logic-devices and quantum information, the SE device has attracted lots of attention. In addition to forming a nano-scaled quantum dot (QD), it is also imperative for SE devices to form self-aligned gate and source/drain electrodes in order to manipulate the QD effectively and to suppress the gate-induced tunneling barrier lowering effect. However, the formation of SE devices from Silicon-on-Insulator(SOI) or SiGe-on-Insulator(SGOI) structures is usually with high cost and restricted design freedom. This motivates us to develop a simple method, “Selectivity oxidation of polycrystalline-SiGe” to form Ge QDs. It is a cost effective and CMOS compatible approach. The main theme of this thesis is to suppress the large incubation time for poly-SiGe deposition onto silicon dioxide (SiO2) and to form uniform poly-SiGe thin film on amorphous-Si and silicon-nitride (Si3N4) surface. In addition, we make use of the selective oxidation of the poly-SiGe thin film to form uniformly distributed Ge QDs. Then we fabricate Ge-QD single-hole transistor (SHT) based on a bottom-gate technology. We have experimentally studied the electrical characteristics and photo-effect of the Ge-QD SHT. Clear Coulomb-blockade oscillation was observed at room temperature and the gate-induced tunneling barrier lowering effect is suppressed. Furthermore, enhanced Coulomb oscillation and peak-to-valley current ratio were realized under photo-excitation. Finally, we discussed the asymmetrical features and trap assisted carrier tunneling effect of this device. Pei-Wen Li 李佩雯 2007 學位論文 ; thesis 83 zh-TW |
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碩士 === 國立中央大學 === 電機工程研究所 === 96 === As CMOS technology is scaling into nanometer regime, the development of devices is towards small dimension, high speed, and low power consumption. Since single-electron (SE) device not only provide the aforementioned advantages but also could be applied to memory-devices, logic-devices and quantum information, the SE device has attracted lots of attention. In addition to forming a nano-scaled quantum dot (QD), it is also imperative for SE devices to form self-aligned gate and source/drain electrodes in order to manipulate the QD effectively and to suppress the gate-induced tunneling barrier lowering effect. However, the formation of SE devices from Silicon-on-Insulator(SOI) or SiGe-on-Insulator(SGOI) structures is usually with high cost and restricted design freedom. This motivates us to develop a simple method, “Selectivity oxidation of polycrystalline-SiGe” to form Ge QDs. It is a cost effective and CMOS compatible approach.
The main theme of this thesis is to suppress the large incubation time for poly-SiGe deposition onto silicon dioxide (SiO2) and to form uniform poly-SiGe thin film on amorphous-Si and silicon-nitride (Si3N4) surface. In addition, we make use of the selective oxidation of the poly-SiGe thin film to form uniformly distributed Ge QDs. Then we fabricate Ge-QD single-hole transistor (SHT) based on a bottom-gate technology. We have experimentally studied the electrical characteristics and photo-effect of the Ge-QD SHT. Clear Coulomb-blockade oscillation was observed at room temperature and the gate-induced tunneling barrier lowering effect is suppressed. Furthermore, enhanced Coulomb oscillation and peak-to-valley current ratio were realized under photo-excitation. Finally, we discussed the asymmetrical features and trap assisted carrier tunneling effect of this device.
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author2 |
Pei-Wen Li |
author_facet |
Pei-Wen Li Shao-hua Hsu 徐紹華 |
author |
Shao-hua Hsu 徐紹華 |
spellingShingle |
Shao-hua Hsu 徐紹華 Germanium quantum-dot single-hole transistors with self-aligned electrodes based on a bottom-gate technology |
author_sort |
Shao-hua Hsu |
title |
Germanium quantum-dot single-hole transistors with self-aligned electrodes based on a bottom-gate technology |
title_short |
Germanium quantum-dot single-hole transistors with self-aligned electrodes based on a bottom-gate technology |
title_full |
Germanium quantum-dot single-hole transistors with self-aligned electrodes based on a bottom-gate technology |
title_fullStr |
Germanium quantum-dot single-hole transistors with self-aligned electrodes based on a bottom-gate technology |
title_full_unstemmed |
Germanium quantum-dot single-hole transistors with self-aligned electrodes based on a bottom-gate technology |
title_sort |
germanium quantum-dot single-hole transistors with self-aligned electrodes based on a bottom-gate technology |
publishDate |
2007 |
url |
http://ndltd.ncl.edu.tw/handle/ux7e4n |
work_keys_str_mv |
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