Design of VLSI Circuits for Tolerating Soft Errors
碩士 === 國立東華大學 === 電子工程研究所 === 96 === In this thesis, we try to deal with one of the challenges for the sequential logic design with injection of soft errors. We propose an effective solution to correct the soft error in the transmission stage and latches. In the traditional latch structure, we can’t...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/32631881593012794923 |