Propagation Delay Minimization for Multi-source Multi-sink Bus with Located Repeater Insertion
碩士 === 南華大學 === 資訊管理學研究所 === 96 === Since the advance of deep submicron meter technology in VLSI, the performance dominating factor is changed from gate delay to interconnect delay. Therefore, how to reduce interconnection delay becomes a critical goal for improving system performance. The RC and...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/21012432956130357659 |