Investigation on Degradation Effect of Low-Temperature Poly-Si TFT under Dynamic Stress

碩士 === 國立中山大學 === 光電工程研究所 === 96 === In this research, the degradation effect of the low temperature polycrystalline silicon TFTs (LTPS TFTs) under dynamic stress was investigated. The experiment results revealed that the degenerate behaviors of n- and p-type poly-Si were different. In p-channel TFT...

Full description

Bibliographic Details
Main Authors: Han-Po Hsieh, 謝漢博
Other Authors: Ting-Chang Chang
Format: Others
Language:en_US
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/4336gf
Description
Summary:碩士 === 國立中山大學 === 光電工程研究所 === 96 === In this research, the degradation effect of the low temperature polycrystalline silicon TFTs (LTPS TFTs) under dynamic stress was investigated. The experiment results revealed that the degenerate behaviors of n- and p-type poly-Si were different. In p-channel TFT, it was observed that the degradation of threshold-voltage (Vth) was closely associated with the stress frequency of ac stress. The degradation was more serious at low-frequency stress than that at high-frequency stress. The degradation of electrical characteristics of device is mainly dominated by the self-heating enhanced negative bias temperature instability effect. Moreover, the increased temperature around the environment could make the degradation of characteristics more serious, such as Vth shift (fixed charge), degraded S.S (dangling bonds). We suggest that the generation of deep states originated from bond broken at both of grain-boundary and interface state was explained the degradation mechanism of threshold-voltage. In n-channel TFT, the degradation characteristics may be attributed to both of the temperature effect and the hot carrier effect under the different stress frequency. At low-frequency stress, Vth shift (positively) and mobility are increased after 100 seconds stress because of the temperature effect. However, Vth shift (negatively) and mobility are decreased after 500 seconds stress because of the effect of the state creation near the drain regime. At high-frequency stress, the times of the switch is numerous, and result in the on-state current decreased because of the trap state generated.