A Physical-Location-Aware X-filling Method for IR-Drop Reduction in At-Speed Scan Test
碩士 === 國立清華大學 === 資訊工程學系 === 96 === In order to ensure that a circuit meets timing requirements, at-speed scan test is widely used to detect delay defects. However, at-speed scan test suffers from the test-induced yield loss. Because the switching activity of whole circuit during test mode is much...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/49569870002625148952 |