Design and Implementation of Low Voltage CMOS Phase-Locked-Loop and Delay-Locked-Loop
碩士 === 臺灣大學 === 電子工程學研究所 === 96 === Low-power CMOS designs have attracted great attention in the past few years. For portable wireless communication systems such as mobile phones, the power dissipation of the integrated circuits is of crucial importance as it predetermines the battery life. Even for...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2007
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/73103347694520526926 |