Low-Voltage Low-Power CMOS Radio Frequency Receiver Front-end Circuits

碩士 === 國立臺灣大學 === 電子工程學研究所 === 96 === This thesis introduces the design issues and implementation of low-voltage low-power radio frequency receiver front-end circuits. To operate in heavily reduced supply voltage, different architectures and design techniques have been proposed. The thesis is organi...

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Bibliographic Details
Main Authors: Jih-Hsin Wang, 王日新
Other Authors: 呂良鴻
Format: Others
Language:en_US
Published: 2008
Online Access:http://ndltd.ncl.edu.tw/handle/77904124724575450389