An Efficient Hardware/Software Communication Mechanism for Reconfigurable NoC
碩士 === 國立中正大學 === 資訊工程所 === 97 === With the progress of technology, more and more intellectual properties (IPs) can be integrated into one single chip. The performance bottleneck has shifted from the computation in individual IPs to the communication among IPs. A Network-on-Chip (NoC) was proposed t...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/85780228613379421632 |