A Thermal-Aware Load Balancing onMulticore Architecture
碩士 === 國立中正大學 === 資訊工程所 === 97 === With the power density increases very rapid in chip, thermal issues have become an important issue. The heat generates with power thus has an effect upon reliability of the processor because of mainly using one of function units on chip. Unevenly distributed power...
Main Authors: | Yuan-Chiao Tang, 湯媛喬 |
---|---|
Other Authors: | Rong-Guey Chang |
Format: | Others |
Language: | en_US |
Published: |
2009
|
Online Access: | http://ndltd.ncl.edu.tw/handle/84589297557515957129 |
Similar Items
-
POWER-AWARE PERFORMANCE OPTIMIZATION ON MULTICORE ARCHITECTURES
by: Mariam Manakkadu, Sheheeda
Published: (2017) -
Interference-aware Batch Memory Scheduling in Heterogeneous Multicore Architecture
by: Yi-Chien Song, et al.
Published: (2014) -
An Analysis Framework for Distributed Resource-Aware Scheduling in Multicore Architectures
by: Aslam, Haris Bin
Published: (2011) -
A High Performance Load Balance Strategy for Real-Time Multicore Systems
by: Keng-Mao Cho, et al.
Published: (2014-01-01) -
Scientific Computing on Multicore Architectures
by: Tillenius, Martin
Published: (2014)