Resource Binding of High-Speed Low-Power Nonzero Clock Skew Circuits
博士 === 中原大學 === 電子工程研究所 === 97 === High speed and low power are two important objectives in the design of edge-triggered circuits. It is well known that the clock skew can be utilized as a manageable resource for high speed and low power. To the best of our knowledge, the circuit is never optimized...
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| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/02553981352341947047 |