Task Partition and Scheduling on Multiple Heterogeneous Application Specific Instruction Set Processors
碩士 === 逢甲大學 === 資訊工程所 === 97 === Stream processing applications demand high throughput. Multiple heterogeneous Application-Specific Instruction-set Processor (ASIP) architectures tend not to offer only sufficient throughput but also runtime flexibility, which cannot be provided by custom ASIC soluti...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2009
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Online Access: | http://ndltd.ncl.edu.tw/handle/68773497398506205745 |