Process Optimization of a Lead Bond Chip Scale Packaging
碩士 === 華梵大學 === 工業工程與經營資訊學系碩士班 === 97 === In the field of semi-conductor packaging, the current trend is toward the development of miniature of Chip Scale Packaging and Fine Pitch Bonding.The lead bound technique of CSP has encountered the challenges from chip size, high I/O, and Fine pitch, and the...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/03654317770815059769 |