Automatic IP Interface Synthesis Supporting Multi-Layer Communication Protocols in SoC Designs
碩士 === 國立中興大學 === 電機工程學系所 === 97 === System-on-Chip (SoC) design methodologies rely heavily on reuse of intellectual property (IP) blocks. IP integration is one of the most challenging works in SoC designs. Because IP blocks often have different communication interface to cope with the protocol of t...
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| Format: | Others |
| Language: | zh-TW |
| Online Access: | http://ndltd.ncl.edu.tw/handle/46461492808222222459 |