Design of a 6 Bits 1GS/s Digital to Analog Converter
碩士 === 國立中興大學 === 電機工程學系所 === 97 === This thesis designs a 6-bit 1GS/s Digital-to-Analog Converter (DAC). The DAC uses full thermometer-coded current steering architecture. In order to degrade the mismatch between the transistors in the current source, we discuss about the size design of the current...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/58479793936563974203 |