The Performance Analysis of Cache Architecture for Real-Time System in Multicore Platform
碩士 === 國立成功大學 === 電腦與通信工程研究所 === 97 === This thesis presents the study and analysis of the performance impact imposed by different configurations of cache memory in real-time system using multi-core processor. A multi-core processor includes two or more cores on a single chip and belongs to the homo...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/17285281585975469072 |