Hot Carrier Reliability in 12V High Voltage P-LDMOS Transistors

• Main Authors: Tai-Ching Wu, 吳泰慶
• Other Authors: Jone-Fong Chen
• Format: Others
• Language: en_US
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/30479749998144585484

碩士 === 國立成功大學 === 微電子工程研究所碩博士班 === 97 === In this thesis, the experiment mainly studies on the hot-carrier reliability of a 0.35 μm p-type lateral double diffusion metal oxide semiconductor field-effect-transistor. Base on the degradation of every parameter, we can analyze the mechanism causing the device degradation. First, the differences between HV device structure and normal LV MOS structure are introduced. The development of LDMOS device is also introduced. As process scaling down, the reliability becomes an important issue to discuss. After hot carrier stress experiment on standard dimension device, some parameters under different gate bias result in different degradation trends. TCAD simulation and charge pumping method are used to confirm the damage location induced different degradation. At last we study on lifetime issue to compare the device reliability. First we need a degradation index in lifetime model. And then we process hot carrier stress experiment on different dimension devices (S, L, and C). Then the extracted lifetime results are compared to find out which dimension variation will improve the device reliability.