A Robust Low Power SRAM Design with Write Assist Circuits
碩士 === 國立交通大學 === 電子工程系所 === 97 === This paper presents a floating BL 8T SRAM Read/Write scheme. A Write assist scheme is also proposed to resolve the serious Write half-select disturb problem, and simulation results show that the proposed Write scheme can work well in more advanced technology nodes...
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| Format: | Others |
| Language: | en_US |
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2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/94046976659254452996 |