On-Chip High Resolution Jitter Measurement Circuit for 6 GHz Clock Generator
碩士 === 國立中央大學 === 電機工程研究所 === 97 === As the improvement of semiconductor technology, VLSI circuit has developed in a system on chip (SoC). If the clock jitter is excessive or phase deviation, the mistakes of system operation will be enerated. In view of this problem, clock synchronization circuits s...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Online Access: | http://ndltd.ncl.edu.tw/handle/15434376169014788974 |