Efficient Yield and Reliability Enhancement Techniques for Random Access Memories

碩士 === 國立中央大學 === 電機工程研究所 === 97 === Yield and reliability are two key challenges for designing nano-scale chips. Embedded memory is one key component in modern system-on-chip (SoC) designs. It typically represents a significant portion of the chip area as well. Moreover, it is designed with the sma...

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Bibliographic Details
Main Authors: Hsing-Chen Lu, 盧星辰
Other Authors: Jin-Fu Li
Format: Others
Language:en_US
Published: 2009
Online Access:http://ndltd.ncl.edu.tw/handle/26827284844866902668