A Multi-Phase Digital PLL Circuit Design
碩士 === 國立高雄第一科技大學 === 電腦與通訊工程所 === 97 === In recent years, phase-locked loop is used in computers and communication systems increasingly widespread, such as clock recovery circuits and frequency synthesizer. By using digital signal to control the structure of the entire phase locked loop, the all-di...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/30752387337190629541 |