All Digital Frequency Synthesizer Using Flying Adder Architecture and Low Power Low Latency 2-dimensional Bypassing Signed Multiplier
碩士 === 國立中山大學 === 通訊工程研究所 === 97 === This thesis includes two topics. The first topic is an ADFS（All Digital Frequency Synthesizer）using a Flying Adder architecture. The second one is a low-power and low-latency 2-dimensional bypassing signed multiplier. In the first topic, the ADFS is implemented b...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/vue22h |