Performance improvement of LDPC coded systems by dynamic scheduling and selective mapping
碩士 === 國立清華大學 === 電機工程學系 === 97 === In this thesis, we propose a dynamic scheduling decoding method, to accelerate the decoding of quasi-cyclic low-density parity-check (QC-LDPC) codes used in the IEEE 802.16e standards based on a previously proposed decoding architecture. We dynamically skip, redo...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/25529169945882892985 |