Design and Implementation of a High Performance Low Complexity Joint Transceiver for MIMO Communications
碩士 === 國立清華大學 === 電機工程學系 === 97 === In this thesis, specification study, system simulation, architecture design and logic design along with field-programmable gate array (FPGA) implementation of a low complexity and high performance joint transceiver for MIMO Communications is presented. Communicat...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2009
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Online Access: | http://ndltd.ncl.edu.tw/handle/69318596461366404199 |