All-digital Clock and Data Recovery and All-digital Phase-locked Loop
碩士 === 國立臺灣大學 === 電子工程學研究所 === 97 === In recent years, the orientation of the fabrication process is to shrink the scaling of the transistor. Scaling down the transistor will have less power consumption and faster operation frequency to design circuits. However, it has extra drawbacks for analog cir...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/72656359516188540808 |